Semiconductor memory having a flexible dual-bank...

Details Semiconductor memory having a flexible dual-bank... Semiconductor memory having a flexible dual-bank...

2006-03-07

2006-03-07

Mai, Son (Department: 2827)

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

C365S185110, C365S185130, C365S185230, C365S230030

Reexamination Certificate

active

07009910

ABSTRACT:
A semiconductor memory includes a plurality of memory array partitioned into first and second memory banks in correspondence with one of a plurality of mask options such that the first memory bank includes at least one but less than all of the plurality of memory arrays and the second memory bank includes a corresponding remainder of the plurality of memory arrays. A first horizontal global row decoder is configured to receive a first subset of addresses for the first memory bank and in response provide a first plurality of predecoded row address signals on a first plurality of lines extending only across the at least one but less than all of the plurality of memory arrays. A second horizontal global row decoder is configured to receive a first subset of addresses for the second memory bank and in response provide a second plurality of predecoded row address signals on a second plurality of lines extending only across the corresponding remainder of the plurality of memory arrays.

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