Semiconductor memory having a bit position decoder and date re-o

Details Semiconductor memory having a bit position decoder and date re-o Semiconductor memory having a bit position decoder and date re-o

1993-07-26

1995-04-18

Gossage, Glenn

Static information storage and retrieval

Magnetic bubbles

Guide structure

36523006, 3652385, 364DIG2, 395400, 345200, G06F 700, G06F 1204, G06F 1300, G11C 700

Patent

active

054086329

ABSTRACT:
A semiconductor memory device for simultaneously accessing data in groups of four bits includes a memory cell block for storing a plurality of 4- bit words. The memory cell block has a plurality of memory cell outputs which are connected to column gate transistors. A gate control circuit is provided for controlling the column gate transistors to access four consecutive bits of data in the memory cells. The accessed four consecutive bits, including a portion of one word and a portion of a subsequent word, are aligned such that the portion of the subsequent word is followed by the portion of one word. A data re-ordering circuit is provided for re-ordering the accessed consecutive bits to align them such that the portion of one word is followed by the portion of the subsequent word.

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