Semiconductor memory element with direct connection of the...

Static information storage and retrieval – Format or disposition of elements

Reexamination Certificate

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C365S063000, C365S230030

Reexamination Certificate

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06914796

ABSTRACT:
The invention relates to a semiconductor memory element comprising a plurality of data pins and at least two memory cell arrays, each of which comprises a plurality of memory cells, and each of which is connected to an array logic for reading in and/or reading out data into or from the respective array, wherein the data pins or interface circuits connected therewith are directly connected to the respective array logic.

REFERENCES:
patent: 5532970 (1996-07-01), Butler et al.
patent: 5798282 (1998-08-01), Bertin et al.
patent: 6611935 (2003-08-01), Landry
IBM Journal of Research Development (T. Sunaga et al. A 64Kb × 32 DRAM for graphics applications Jan./Mar. 1995, pp. 43-50).

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