Semiconductor memory devices

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365200, G06F 1110, G06F 1100

Patent

active

044609981

ABSTRACT:
In addition to a main memory device a spare memory device is provided. Both memory devices utilize word wires in common which are arranged to constitute matrix circuits together with groups of bit lines. When a bit error is contained in data read out from the main memory device, a correction circuit correcting the error and a register for storing the error are provided. An output of the register is used to switch a bit line from which the error has been detected to a corresponding bit line of the spare memory device.

REFERENCES:
patent: 3434116 (1969-03-01), Anacker
patent: 3544777 (1970-12-01), Winkler
patent: 3898443 (1975-08-01), Smith

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