Semiconductor memory device with power supply wiring on the...

Details Semiconductor memory device with power supply wiring on the... Semiconductor memory device with power supply wiring on the...

2007-07-24

2009-06-02

Dinh, Son (Department: 2824)

Static information storage and retrieval

Format or disposition of elements

C365S063000

Reexamination Certificate

active

07542321

ABSTRACT:
A memory cell array in a semiconductor substrate has a plurality of memory cells arranged in rows and columns. A first circuit is located at one end of the memory cell array in a column direction. A second circuit is located at the other end of the memory cell array in the column direction. A first wire is located above the memory cell array between the first circuit and the second circuit. The first wire is located in a most upper layer in the semiconductor substrate to supply power to the second circuit.

REFERENCES:
patent: 6807120 (2004-10-01), Sekiguchi et al.
patent: 6944080 (2005-09-01), Sekiguchi et al.
patent: 2006/0198196 (2006-09-01), Abe et al.
patent: 2006-245547 (2006-09-01), None

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