Semiconductor memory device with plural trigger circuits for dat

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Clock or pulse waveform generating

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327293, H03K 300

Patent

active

061540803

ABSTRACT:
In a synchronous semiconductor memory device including a memory cell array, a burst counter for generating an internal address signal in synchronization with an external clock signal and a decoder for reading out data from the memory cell array according to the internal address signal, an internal clock generation circuit generates an internal clock signal having a frequency equal to 1/2 of the frequency of the external clock signal in synchronization with the external clock signal, and a data output circuit outputs the data read out of the memory cell array in synchronization with both a rising edge and a falling edge of the internal clock signal.

REFERENCES:
patent: 5341031 (1994-08-01), Kinoshita et al.
patent: 5579267 (1996-11-01), Koshikawa
patent: 5691955 (1997-11-01), Yamauchi
patent: 5740121 (1998-04-01), Suzuki et al.
patent: 5774007 (1998-06-01), Soneda
patent: 5812835 (1998-09-01), Ruuskanen
patent: 5821643 (1998-10-01), Mandelcorn

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