Semiconductor memory device with internal control signal based u

Details Semiconductor memory device with internal control signal based u Semiconductor memory device with internal control signal based u

1990-02-23

1990-11-13

Hecker, Stuart N.

Static information storage and retrieval

Powering

365195, 36518905, 365233, G11C 11413, G11C 700

Patent

active

049706934

ABSTRACT:
A semiconductor memory device is connected to a power source and includes a reference potential line connected to receive a reference potential from the power source. An input circuit is connected to the reference potential line and receives an external input signal having a logic level defined in reference to the reference potential to be supplied to the source potential line. The output circuit has an external output terminal which is connected to the reference potential line. The output circuit is for generating an output to the external output terminal. An inhibiting circuit inhibits a response to the external input signal of the input circuit for a predetermined period during which the output of the output circuit changes.

REFERENCES:
patent: 4165541 (1979-08-01), Varshney et al.
patent: 4585955 (1986-04-01), Uchida
patent: 4616143 (1986-10-01), Miyamoto
patent: 4638182 (1987-01-01), McAdams

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