Semiconductor memory device with improved memory arrangement

Static information storage and retrieval – Addressing

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G11C 800

Patent

active

045846740

ABSTRACT:
A semiconductor memory device which is hardly affected by short-circuiting between word lines and can be fabricated with a high integration density is disclosed. The memory device is featured in that a plurality of word lines are assigned to each decoder in common via plurality of selection circuits and each adjacent word lines are connected to different decoders.

REFERENCES:
patent: 4369503 (1983-01-01), Isogai
patent: 4429374 (1984-01-01), Tanimura

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