Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Patent
1995-08-22
1996-10-01
Clawson, Jr., Joseph E.
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
36518911, 365201, G11C 800
Patent
active
055616399
ABSTRACT:
Disclosed is a semiconductor memory device carrying out reading and writing operations of data, comprising memory means consisting of a plurality of memory cells for storing data; test signal generation means for generating a test signal upon a test being carried out; at least one first buffer for receiving an external address bit and generating inverting and noninverting address bits; at least one second address buffer for selectively receiving said external address bit in response to said test signal from said test signal generation means and generating said inverting and noninverting address bits or the signals of the same logic value through two output terminals thereof; decoding means for receiving output signals from said first and second address buffers and selecting one or plural corresponding memory cells of said memory means; and voltage level compensation means for compensating a voltage level applied to each of words lines of said memory cells selected by said decoding means in accordance with said test signal from said test signal generation means. The device can reduce the test time by selecting plural memory cell rows in accordance with any one address applied from an external during burn-in test, differently from the normal operation.
REFERENCES:
patent: 5323357 (1994-06-01), Kaneko
patent: 5331594 (1994-07-01), Hotta
patent: 5408436 (1995-04-01), Moloney et al.
Bae Huy C.
Chung Kwang Y.
Jang Kyeong J.
Lee Ho J.
Lee Kang C.
Clawson Jr. Joseph E.
Hyundai Electronics Industries Co,. Ltd.
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