Static information storage and retrieval – Addressing
Patent
1980-11-12
1983-07-05
Hecker, Stuart N.
Static information storage and retrieval
Addressing
G11C 800
Patent
active
043922120
ABSTRACT:
A semiconductor memory device includes in its chip a decoder circuit which receives external selection signals for selecting a memory chip. The decoder circuit performs the selection of the memory chip in accordance with a logic corresponding to the combination of the external selection signals. The selection logic can be changed by the user of the semiconductor device.
REFERENCES:
patent: 3969706 (1976-07-01), Proebsting et al.
patent: 4200919 (1980-04-01), Page et al.
Hession et al., IBM Tech. Disc. Bul., vol. 21, No. 4, 9/78, pp. 1563-1564, "Chip Select Technique for Multi-Chip Decoding".
Higuchi Mitsuo
Miyasaka Kiyoshi
Fujitsu Limited
Hecker Stuart N.
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