Semiconductor memory device with control block sharing row...

Details Semiconductor memory device with control block sharing row... Semiconductor memory device with control block sharing row...

2008-03-13

2010-06-08

Luu, Pho M. (Department: 2824)

Static information storage and retrieval

Addressing

Plural blocks or banks

C365S189040, C365S189050, C365S230060

Reexamination Certificate

active

07733734

ABSTRACT:
A semiconductor memory device comprises a plurality of banks including a plurality of mat rows, respectively, wherein the mat row includes a plurality of mats disposed in a same row, row decoder groups disposed between the banks and including row decoders that correspond to the mat rows, respectively, and common control blocks installed corresponding to a predetermined number of row decoders to simultaneously control the row decoders.

REFERENCES:
patent: 5708623 (1998-01-01), Choi
patent: 6078542 (2000-06-01), Tomishima
patent: 6704240 (2004-03-01), Kang
patent: 6765842 (2004-07-01), Kim
patent: 7079417 (2006-07-01), Nam et al.
patent: 7577025 (2009-08-01), Kim et al.
patent: 2005/0141323 (2005-06-01), Shim
patent: 09-219091 (1997-08-01), None
patent: 1020070057336 (2007-06-01), None

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