Semiconductor memory device with changeable word organization mo

Details Semiconductor memory device with changeable word organization mo Semiconductor memory device with changeable word organization mo

1988-10-31

1990-03-06

Hecker, Stuart N.

Static information storage and retrieval

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Byte or page addressing

365201, 36523003, 36518903, 36518904, 364900, 371 211, G11C 700

Patent

active

049072030

ABSTRACT:
A semiconductor memory device comprises a memory cell array, a row decoder, a column decoder, a plurality of sense amplifiers, a plurality of write circuits, a signal switching circuit, a plurality of input buffers, a plurality of output buffers and a plurality of terminals, which are formed on the same chip. A switching signal B1/B4 is applied to one of the plurality of terminals. The semiconductor memory device has a 256K word by 4 bit organization when the switching signal B1/B4 is at an "L" level and has a 1M word by 1 bit organization when the switching signal B1/B4 is at an "H" level. The word organization can be switched mainly by the signal switching circuit.

REFERENCES:
patent: 4354256 (1982-10-01), Miyasaka
patent: 4667285 (1987-05-01), Suzuki et al.
patent: 4763304 (1988-09-01), Uesugi
Kayano et al. "25-nk 256K x 1 /64K x 4 CMOS SRAM's" IEEE Journal of Solid State Circuits, vol. SC-21, No. 5, Oct. 1986, pp. 686-691.

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