Semiconductor memory device with built-in confirmation unit for

Details Semiconductor memory device with built-in confirmation unit for Semiconductor memory device with built-in confirmation unit for

1993-05-27

1995-10-31

Beausoliel, Jr., Robert W.

Static information storage and retrieval

Magnetic bubbles

Guide structure

365200, G11C 2900, G11C 800

Patent

active

054636361

ABSTRACT:
Memory cells incorporated in a semiconductor memory device are subjected to an accelerating test before delivery to a purchaser for screening out defective products, and a word line driver unit selectively drives word lines to a test voltage level higher than a standard power voltage level to word lines for strongly biasing the memory cells, wherein a confirmation unit has a first monitoring circuit for producing a warning signal indicative of the standard power voltage level supplied to the word line driver unit in the accelerating test, a second monitoring circuit for producing a detecting signal indicative of the test voltage level, and a non-volatile memory circuit enabled with the detecting signal for storing the warning signal in a readable manner so that an analyst can confirms the accelerating test duly carried out.

REFERENCES:
patent: 4970727 (1990-11-01), Miyawaki et al.
patent: 5051995 (1991-09-01), Tobita
patent: 5077738 (1991-12-01), Larsen et al.
patent: 5119337 (1992-06-01), Shimizu et al.
patent: 5142495 (1992-08-01), Canepa

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