Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2002-07-30
2003-10-28
Phung, Anh (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185110, C365S230030
Reexamination Certificate
active
06639843
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a semiconductor memory device and, more particularly, to a semiconductor memory device having a nonvolatile memory of a block-unit erase type mounted thereon such as a flash memory which can erase data in predetermined units and which can necessary and optimum data management in a data write operation.
2. Description of the Prior Art
In general, data transfer is performed in units of 512 bytes between a semiconductor memory device using a nonvolatile memory and an external information processing device such as a host computer terminal (to be referred to as a “host” hereinafter). On the other hand, in the nonvolatile memory mounted on the semiconductor memory device, data erase is performed in units of erase blocks, i.e., which are predetermined data units of several kilo bytes to several tens kilo bytes. The size of the erase block unit is considerably larger than that of the data transfer unit (512 byte).
In a semiconductor memory device in which an erase block size of the nonvolatile memory in the semiconductor memory device is not equal to a data input/output unit size required by a host, when a data write process or the like is performed, data transfer between the host and the semiconductor memory device is performed in a manner such that the host gives a read/write request (command) to the semiconductor memory device with designation of an address representing a position in a storage region for the subject data.
In a storage device using a storage medium such as a hard disk on which data can be overwritten, data is overwritten to a storage region corresponding to a received address in a magnetic disk to perform a data write process. However, data cannot be generally overwritten in a nonvolatile memory such as a flash memory for use in the semiconductor memory device. In other words, an erase operation is always required to write data. For this reason, taking account of the number of times of the erase operations being limited, a process such as an address conversion process for data management is required.
When data held in a nonvolatile memory is overwritten, an entire erase block including the data must be overwritten. In order to improve a write efficiency, the semiconductor memory device is provided with a conversion table storage unit (RAM) for storing an address conversion table. This address conversion table is used to correlate between logical sector addresses (logical sector numbers) transmitted from a host and physical sector addresses (physical sector numbers) in the nonvolatile memory.
More specifically, in a data write operation, in the case where data has been previously written in a target sector of a sector number designated by a host, an unused sector is searched, and subject data is written in the searched unused sector. In this case, since the data is written in the sector of the number different from the sector number designated by the host, the sector number (logical sector address) designated by the host must be converted into the number (physical sector number) of the searched sector in which the data is actually written. For this purpose, the address conversion table is included in the semiconductor memory device.
When data is to be overwritten in a block-unit erase type semiconductor memory device, an original erase block including the data to be overwritten is not processed, new data is written in a vacant region in a nonvolatile memory together with the data of the original erase block, and an address conversion table is overwritten to correspond to the new erase block. Thereafter, with reference to the address conversion table, a logical sector address sent from the host can be correlated to a physical sector address in the nonvolatile memory, so that the data in the nonvolatile memory can be accessed.
Conventionally, as a general known address conversion method, a method is disclosed in Japanese Unexamined Patent Laid-Open Publication No. 8-212019. In this method, a quotient obtained by dividing a logical (sector) address designated from the host by the number of sectors which can be held in one erase block in a nonvolatile memory is set as a logical block address, and a residual thereof is set as an offset. In this case, the logical (sector) address means a designated sector address transmitted from the host, and one sector is given to a block having, e.g., 512 bytes. The offset is not changed, and the logical block address (i.e., logical block number) is converted into a physical block address (i.e., erase block number) by using the address conversion table, so that data can be are managed. This address conversion method has a following advantage. That is, even though a semiconductor memory device has a large capacity, an offset is shared by sectors to make it possible to reduce data required for the address conversion table.
However, in this conventional method using such an address conversion, when continuous data is written, processes can be conveniently performed without any loss. However, when data are written in units of sectors, or when data are written at random in a plurality of erase blocks, a process time required for arranging unnecessary data becomes long, and data write rate cannot be kept constant to be a problem.
SUMMARY OF THE INVENTION
The present invention has been made to solve the above problem, and has an object to provide a semiconductor memory device having a block-unit erase type nonvolatile memory mounted thereon to perform necessary and optimum data management in a data write process and to shorten process time required for arranging unnecessary data and keep a data write rate constant even though data are written in units of sectors or data are written at random in a plurality of erase blocks.
In order to achieve the above object, a first aspect of the present invention provides a semiconductor memory device having a nonvolatile memory of which an erase block size is not equal to a data access size of a host section. The semiconductor memory device includes a CPU which calculates a quotient and a residual through dividing a logical sector address given by the host section for a data transfer by a predetermined number of sectors possibly held in one erase block. The quotient is used as a logical block number and the residual is used as an offset in a logical block.
The semiconductor memory device further includes: an address conversion table storage portion which holds an address conversion table used for converting the logical block number into an erase block number of the nonvolatile memory; and a conversion table creating unit which creates the address conversion table onto the address conversion table storage portion by dispersively storing pieces of address conversion table information in each of the erase blocks and reading out the logical block numbers from the erase blocks.
In this construction, the CPU writes data received from the host section into a vacant erase block of the erase blocks in a data writing operation, and the CPU has a storage region for storing a used address of the vacant erase block and two physical block addresses corresponding to one logical block address.
A second aspect of the present invention provides a semiconductor memory device having a nonvolatile memory portion of a block-unit erase type for sending and receiving data to and from a host section. The semiconductor memory device includes an arithmetic processing unit which entirely controls arithmetic processes of the semiconductor memory device and calculates logical block numbers from logical sector addresses given by the host section, and the nonvolatile memory portion includes a plurality of nonvolatile memories for dispersively storing data.
The semiconductor memory device further includes a conversion table storage portion which holds an address conversion table for converting the calculated logical block numbers into physical addresses serving as erase block numbers of the nonvolatile memories.
In this construction, the arit
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