Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2007-08-21
2007-08-21
Elms, Richard T. (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185180
Reexamination Certificate
active
11136369
ABSTRACT:
A memory cell array on a region of a substrate, the cell array having word lines, bit lines and memory cells at crossings between the word and bit lines, drain and source of each memory cell coupled to a bit line and source line, respectively; and a sense amplifier circuit reading data of selected memory cells. The device has a data read mode detecting whether cell current flows from a bit line to the source line in accordance with data of a memory cell under the condition the well region is set at a base potential; a selected word line is applied with a read voltage, which turns on or off the memory cell in accordance with data thereof; the source line is applied with a first voltage higher than the base potential; and the selected bit line is applied with a second voltage higher than the first voltage.
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Elms Richard T.
Kabushiki Kaisha Toshiba
King Douglas
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