Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Patent
1997-05-08
1998-12-22
Nelms, David C.
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
36523003, 36523008, G11C 800
Patent
active
058525831
ABSTRACT:
Following latching of a word line select signal by a latch circuit, a transfer gate is turned off. When a word line is selected, the voltage applied to the latch circuit is shifted to a desired level to apply a desired voltage to the word line from a word line driver. As a result, a predecode signal is applied to a small size buffering circuit to be transmitted to the word line driver at a potential level between Vcc-GND. Therefore, the parasitic capacitance accompanying a predecode signal is reduced.
REFERENCES:
patent: 4916334 (1990-04-01), Minagawa et al.
patent: 4922458 (1990-05-01), Watanabe et al.
patent: 4951259 (1990-08-01), Sato et al.
patent: 5398047 (1995-03-01), Nara et al.
patent: 5490119 (1996-02-01), Sakurai et al.
patent: 5612924 (1997-03-01), Miyamoto
patent: 5615164 (1997-03-01), Kirihata et al.
patent: 5621691 (1997-04-01), Park
Kawai Shinji
Kobayashi Shin-ichi
Matsuo Akinori
Taito Yasuhiko
Wada Masashi
Mitsubishi Denki & Kabushiki Kaisha
Nelms David C.
Nguyen Hien
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