Semiconductor memory device that can realize high speed data rea

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

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Details

36523003, 36523008, G11C 800

Patent

active

058525831

ABSTRACT:
Following latching of a word line select signal by a latch circuit, a transfer gate is turned off. When a word line is selected, the voltage applied to the latch circuit is shifted to a desired level to apply a desired voltage to the word line from a word line driver. As a result, a predecode signal is applied to a small size buffering circuit to be transmitted to the word line driver at a potential level between Vcc-GND. Therefore, the parasitic capacitance accompanying a predecode signal is reduced.

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patent: 5621691 (1997-04-01), Park

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