Semiconductor memory device surely reset upon power on

Details Semiconductor memory device surely reset upon power on Semiconductor memory device surely reset upon power on

1997-12-15

1999-02-09

Nelms, David

Glass manufacturing

Means drawing sheet from bath

With width maintaining and/or lateral stretching means

36518905, 365226, 36523008, G11C 700, G11C 1604, G11C 800

Patent

active

058703420

ABSTRACT:
A mode setting signal generating circuit activates mode setting signals in accordance with external signals. A test mode activating signal generating circuit takes in an externally applied address signal Add as the mode setting signals are activated, and drives a test mode activating signal to the active state in accordance with the state thereof. As power on detection signal from a power on detection circuit is activated, test mode activating signal is reset to the initial state, and a reset circuit holds the test mode activating signal at the inactive state, in accordance with imperfect activation of the power on detection signal. Internal state is prevented from erroneously set to a test mode state, even when power on detection signal is imperfectly generated at the time of power on.

REFERENCES:
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patent: 5365481 (1994-11-01), Sawada
patent: 5469402 (1995-11-01), Yamauchi et al.
patent: 5530397 (1996-06-01), Nakai et al.
patent: 5631867 (1997-05-01), Akmatsu et al.
patent: 5732034 (1998-03-01), Asakura et al.

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