Semiconductor memory device selectively operating divided memory

Details Semiconductor memory device selectively operating divided memory Semiconductor memory device selectively operating divided memory

1995-03-24

1996-03-12

Nelms, David C.

Static information storage and retrieval

Addressing

Plural blocks or banks

36523004, 36523006, 365203, 365149, G11C 800

Patent

active

054992168

ABSTRACT:
A sub row selector is provided in addition to a row selector in a semiconductor memory device selectively operating a plurality of divided memory blocks. A selector of the sub row selector generates a sub row select signal for connecting a bit line pair corresponding to a selected row address and an input/output data line pair in a selected memory block in response to a memory block select signal and a corresponding row select signal. Therefore, only in a selected memory block, a bit line pair corresponding to the selected row address and the input/output data line are connected. As a result, it is possible to selectively operate memory blocks divided in plural with a potential difference between the initial charge potential of each bit line pair and the initial charge potential of each input/output data line pair in a non-selected memory block.

REFERENCES:
patent: 4825418 (1989-04-01), Itoh et al.
patent: 5321657 (1994-06-01), Arimoto et al.

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