Semiconductor memory device provided with an interface circuit c

Details Semiconductor memory device provided with an interface circuit c Semiconductor memory device provided with an interface circuit c

1998-07-29

2000-02-29

Nguyen, Viet Q.

Static information storage and retrieval

Powering

Data preservation

365226, 365227, 365222, G11C 700

Patent

active

060317825

ABSTRACT:
A clock buffer in a semiconductor memory device includes two kinds of interface circuits, i.e., an LVTTL interface and an SSTL interface. When the semiconductor memory device is set to a specific mode (self-refresh mode) for suppressing a power consumption, the LVTTL is used for taking in an external signal. In a mode other than the self-refresh mode, the SSTL interface is used to take in an externally supplied signal. Thereby, a current can be suppressed in the specific mode.

REFERENCES:
patent: 5627791 (1997-05-01), Wright et al.
patent: 5629897 (1997-05-01), Iwamoto et al.
patent: 5708611 (1998-01-01), Iwamoto et al.
patent: 5708622 (1998-01-01), Ohtani et al.
patent: 5798976 (1998-08-01), Arimoto
patent: 5818777 (1998-10-01), Seyyedy
patent: 5835448 (1998-11-01), Ohtani et al.

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