Static information storage and retrieval – Powering
Reexamination Certificate
2003-10-02
2008-05-13
Tran, Michael T (Department: 2827)
Static information storage and retrieval
Powering
C365S189070
Reexamination Certificate
active
07372758
ABSTRACT:
A memory cell array employs a memory element as a memory cell. The memory element is constructed of a gate electrode formed via a gate insulation film on a semiconductor layer, a channel region arranged under the gate electrode, diffusion regions that are arranged on both sides of the channel region and have a conductive type opposite to that of the channel region, and memory function bodies that are arranged on both sides of the gate electrode and have a function to retain electric charges. When first and second power voltages VCC1and VCC2supplied from the outside are lower than a prescribed voltage, a rewrite command to a memory circuit34that includes the memory cell array is inhibited by a lockout circuit33a. With this arrangement, there are provided a semiconductor storage device capable of achieving storage retainment of two bits or more per memory element and stable operation even if the device is miniaturized and preventing the occurrence of a malfunction of rewrite error and so on attributed to a reduction in the power voltage supplied from the outside and a control method therefor.
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Iwata Hiroshi
Nawaki Masaru
Shibata Akihide
Tokui Kei
Yaoi Yoshifumi
Birch & Stewart Kolasch & Birch, LLP
Sharp Kabushiki Kaisha
Tran Michael T
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