Semiconductor memory device incorporating address change detecti

Details Semiconductor memory device incorporating address change detecti Semiconductor memory device incorporating address change detecti

1994-06-22

1996-01-09

Nelms, David C.

Static information storage and retrieval

Addressing

Sync/clocking

3652385, 365194, 36518907, 326 98, G11C 800

Patent

active

054834988

ABSTRACT:
A semiconductor memory device of the invention is provided with a usual access mode and a rapid access mode. The semiconductor memory device includes: a change detection circuit, provided for each of bit signals which are a part of an address signal, for detecting a change of the address signal; a timer circuit for, when the change detection circuit detects the change of the address signal, generating a signal indicating the change of the address; and an output circuit for outputting the signal generated by the timer circuit as a signal which controls a wait of access in each of the access modes.

REFERENCES:
patent: 4744063 (1988-05-01), Ohtani et al.
patent: 4922122 (1990-05-01), Dubujet
patent: 5159574 (1992-10-01), Kim et al.
patent: 5264737 (1993-11-01), Oikawa
patent: 5305284 (1994-04-01), Iwase
patent: 5313436 (1994-05-01), Matsubishi
Ashmore, B., et al., "Session 2: High-speed SRAMs" ISSCC 89(IEEE International Solid-State Circuits Conference) (Feb. 15, 1989) pp. 40-41.

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