Semiconductor memory device including bit check function and tes

Static information storage and retrieval – Associative memories – Ferroelectric cell

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Details

36518907, 365201, 365200, 365154, 36518909, G11C 1500

Patent

active

054885787

ABSTRACT:
The semiconductor memory device includes word lines, bit line pairs crossing the word lines, memory cells disposed, a row decoder, and sense amplifiers. The device further includes a plurality of comparing circuits, a plurality of control circuits, and a determination signal generating circuit. Each comparing circuit compares a data signal read out from the corresponding memory cell with a reference signal externally applied when the reference signal is at an H level, and generates a result signal indicating whether or not the data signal matches the reference signal. Each control circuit carries out control so that a result signal from the comparing circuit indicates a match irrespectively of whether or not the data signal matching the reference signal when the reference signal is at an L level. The determination signal generating circuit generates a determination signal indicating a match when all of the results signals from the comparing circuits indicate a match, and generates a determination signal indicating a mismatch when any of the result signals from the comparing circuits indicates a mismatch.

REFERENCES:
patent: 5184327 (1993-02-01), Matsuda et al.
patent: 5195099 (1993-03-01), Ueda et al.
patent: 5267190 (1993-11-01), Easley et al.

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