Semiconductor memory device including a reference cell

Static information storage and retrieval – Format or disposition of elements

Reexamination Certificate

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C365S158000, C365S171000

Reexamination Certificate

active

08045355

ABSTRACT:
A semiconductor memory device comprises a plurality of cell arrays, each cell array including a plurality of mutually parallel word lines, a plurality of mutually parallel bit lines disposed to cross these word lines, and a plurality of cells connected to the intersections of these word lines and bit lines, respectively, one portion of the cell arrays forming a memory cell array that has the cells as memory cells, and another portion of the cell arrays forming a reference cell array that has the cells as reference cells. A cell selection circuit is operative to select from the memory cell array a memory cell whose data is to be read, and to select from the reference cell array a reference cell at a position corresponding to a position of the memory cell selected in the memory cell array. A sense amplifier circuit is operative to detect and compare a current or a voltage of the selected memory cell with a current or a voltage of the selected reference cell, and thereby read data of the memory cell.

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patent: 2002-541613 (2002-12-01), None

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