Semiconductor memory device in which source line potential...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185260

Reexamination Certificate

active

06856544

ABSTRACT:
A semiconductor memory device is provided with a memory cell, at least one select gate transistor and a circuit. The circuit is configured to rewrite data in the memory cell by applying a potential difference between the gate and the source or between the gate and the drain, which is larger than a power supply voltage. The circuit operates in a first data programming mode and a second data programming mode. A first command or a first combination is used for the first data programming mode. A second command or a second command combination is used for the second data programming mode. The source line is set to different potentials between the first data programming mode and the second data programming mode, in a period when data is rewritten, by using the different command or the different command combination.

REFERENCES:
patent: 5615165 (1997-03-01), Tanaka et al.
patent: 5774397 (1998-06-01), Endoh et al.
patent: 5798547 (1998-08-01), Urai
patent: 6567305 (2003-05-01), Nakamura
patent: 7-169285 (1995-07-01), None

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