Semiconductor memory device in which data are read and written a

Details Semiconductor memory device in which data are read and written a Semiconductor memory device in which data are read and written a

1994-10-26

1996-05-14

Nelms, David C.

Static information storage and retrieval

Addressing

Including particular address buffer or latch circuit...

365233, 365239, 365240, 36523006, G11C 800

Patent

active

055174590

ABSTRACT:
A semiconductor memory device includes an address register circuit for storing a plurality of address signals when an address latch enable signal is active in synchronization with a basic timing signal. When an internal operation start instructing signal is activated, a selected address signal from the address register circuit is supplied to a row decoder and a column decoder for memory cell selection. While an internal memory selection operation is performed, an address signal is stored in the address register circuit. Application of an address signal and a memory accessing is carried out asynchronously.

REFERENCES:
patent: 4903242 (1990-02-01), Hamaguchi et al.
patent: 5068848 (1991-11-01), Rabaey et al.
patent: 5077693 (1991-12-01), Hardee et al.
patent: 5126975 (1992-06-01), Handy et al.
patent: 5243560 (1993-09-01), Amishiro et al.
A 2-ns Cycle, 3.8 ns Access 512-kb CMOS ECL SRAM with a Fully Pipelined Architecture, Chappell et al., IEEE vol. 26, No. 11, Nov. 1991 pp. 1577-1584.

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