Semiconductor memory device having word line driver requiring si

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

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Details

36523003, 365203, G11C 800

Patent

active

055196659

ABSTRACT:
A semiconductor memory device includes at least one word line, at least one memory cell coupled to the word line, a decoder circuit responding to address information to generate a word line drive signal taking one of an active level and an inactive level, a signal generator generating a reset signal tacking an active level in a reset mode and an inactive level in a selection mode, and a word line driver coupled to receive the word line drive signal and the reset signal and to the word line. The word line driver includes a first drive circuit responding to the active level of the reset signal to drive the word line to a non-selection level and maintaining the word line at the non-selection level when the word line drive signal and the reset signal are at the inactive level. A second drive circuit responds to the active level of the word line drive signal and the inactive level of the reset signal to drive the word line to a selection level.

REFERENCES:
patent: 4789967 (1988-12-01), Lion et al.

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