Static information storage and retrieval – Addressing – Sync/clocking
Patent
1997-11-28
1999-02-16
Nelms, David
Static information storage and retrieval
Addressing
Sync/clocking
36523008, 36518905, 365194, G11C 800
Patent
active
058727418
ABSTRACT:
A semiconductor memory device has a voltage converter for converting a voltage level of an internal clock signal to obtain a high voltage level clock signal. The high level clock signal accelerates the transmission of the clock signal to latch circuits which control the output transistors of the memory device. Another voltage converter is disposed between the data amplifier and the latch circuit instead of the output of the latch circuit, for prevention of current flowing through both the output transistors.
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patent: 5715198 (1998-02-01), Braceras et al.
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patent: 5729502 (1998-03-01), Furutani et al.
patent: 5748553 (1998-05-01), Kitamura
patent: 5781499 (1998-07-01), Koshikawa
NEC Corporation
Nelms David
Nguyen Tuan T.
Whitham Michael E.
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