Semiconductor memory device having variable number of selected c

Static information storage and retrieval – Floating gate – Particular connection

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36518511, 36518517, 36518533, G11C 1604

Patent

active

059869330

ABSTRACT:
A semiconductor memory device for easily optimizing a page size and a block size according to use in order to perform write, read and erase operations at the same time is provided. If a user inputs a command from outside using a memory device having a plurality of standard sub-cell arrays or if a short process step is added to memory devices at the time of their shipping, the page sizes for the read and write operations can freely be selected, and the write, read and erase units can be optimized according to use in a system design, therefore, the highest system performance can be achieved, and an advantage in compatibility of devices of different generations can be obtained.

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