Static information storage and retrieval – Floating gate – Particular connection
Patent
1999-09-01
2000-04-25
Mai, Son
Static information storage and retrieval
Floating gate
Particular connection
36518529, G11C 1604
Patent
active
060551844
ABSTRACT:
A flash electrically erasable and programmable read only memory (EEPROM) having a selective parallel sector erase capability (100) is disclosed. The flash EEPROM (100) includes a number of sectors (104-0 to 104-18), each of which receives an erase voltage (VCC) by way of a source switch circuit (112-0 to 112-18). The source switch circuits (112-0 to 112-18) are each enabled by logic values stored in corresponding tag registers (114-0 to 114-18). The logic values stored by the tag registers (114-0 to 114-18) can be established by the application of particular address values (A12 to A18). The logic values of the tag registers (114-0 to 114-18) can be simultaneously reset to the same value by the application of other address values (A9).
REFERENCES:
patent: 5418752 (1995-05-01), Harari et al.
patent: 5774398 (1998-06-01), Ishida
patent: 5787037 (1998-07-01), Amanai
patent: 5862079 (1999-01-01), Jinbo
Acharya Pramod
Lahiri Jayanta
Moon Nathan
Hoel Carlton H.
Holland Robby T.
Mai Son
Telecky Jr. Frederick J.
Texas Instruments Incorporated
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