Static information storage and retrieval – Addressing – Sync/clocking
Patent
1995-05-03
1996-09-10
Zarabian, A.
Static information storage and retrieval
Addressing
Sync/clocking
36523003, G11C 800
Patent
active
055552170
ABSTRACT:
In a semiconductor memory device including a memory cell array, a digit line for receiving read data from a selected one of read-only memory cells of the memory cell array, a sense amplifier for sensing a voltage at the digit line to generate a sense voltage signal, and a comparator for comparing the sense voltage signal with a reference voltage signal to generate an output signal, a presetting circuit and a constant voltage generating circuit are provided to preset the sense voltage signal by receiving an address transition detection signal.
REFERENCES:
patent: 4972374 (1990-11-01), Wang
patent: 5416740 (1995-05-01), Fujita
NEC Corporation
Zarabian A.
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