Semiconductor memory device having noise killer circuit

Details Semiconductor memory device having noise killer circuit Semiconductor memory device having noise killer circuit

1995-01-27

1998-10-20

Nelms, David C.

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

36518911, 326108, G11C 800

Patent

active

058257144

ABSTRACT:
A semiconductor memory device comprising a plurality of row decoders, each having a precharge circuit connected to receive a precharge signal and a decode circuit connected to receive address signals. A level-shifted precharge signal is input to the precharge circuits.

REFERENCES:
patent: 4344005 (1982-08-01), Stewart
patent: 5103113 (1992-04-01), Inui
patent: 5202855 (1993-04-01), Morton
patent: 5227996 (1993-07-01), Uchida
patent: 5282167 (1994-01-01), Tanaka et al.
patent: 5373479 (1994-12-01), Noda
patent: 5412331 (1995-05-01), Jun
"High-Speed, High-Reliability Circuit Design for Megabit DRAM", Gillingham, et al.; IEEE J. of Solid-State Circuit, vol. 26, No. 8, Aug. 1991.
1991 VISI Symp., Circuits 14-5.

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