Semiconductor memory device having improved column selection str

Static information storage and retrieval – Addressing

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G11C 800

Patent

active

043542590

ABSTRACT:
A memory device operable at high-speed and with low power consumption is disclosed. The device in which row address information and column address information are incorporated in synchronism with a row strobe signal and a column strobe signal, respectively, and refresh is effected in response to a row address, comprises a plurality of groups of selection gates for selectively supplying the incorporated column address information to a part of a plurality of column address decoders.

REFERENCES:
patent: 3828320 (1974-08-01), Dinerman et al.
patent: 4050061 (1977-09-01), Kitagawa

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