Semiconductor memory device having high stability and...

Details Semiconductor memory device having high stability and... Semiconductor memory device having high stability and...

2011-02-08

2011-02-08

Elms, Richard (Department: 2824)

Static information storage and retrieval

Addressing

Multiplexing

C365S189020, C365S203000

Reexamination Certificate

active

07885136

ABSTRACT:
A semiconductor memory cell device includes a first multiplexer selecting a sub-block including a memory cell storing data to be read out in a row, a drain selector selecting a first column line connected to one terminal of the memory cell to be read, a precharge selector selecting a second column line connected to the other terminal of the memory cells adjacent to the one terminal of the memory cell storing the data to be readout, a second multiplexer selecting the sub-block including the second column line, a source selector selecting a third column line connected to the other terminal of the memory cell storing the data to be read out. The second multiplexer and precharge selector, when selecting, apply a first voltage to the second column line, and the source selector, when selecting, applies a second voltage to the third column line.

REFERENCES:
patent: 6467056 (2002-10-01), Satou et al.
patent: 2005/0265107 (2005-12-01), Tanaka
patent: 2006/0239059 (2006-10-01), Murata

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