Semiconductor memory device having function of generating booste

Static information storage and retrieval – Powering

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36518909, 36523006, 327589, G11C 1300, G11C 800

Patent

active

055879560

ABSTRACT:
A level determining circuit performs level determination of a potential of a boosted potential node. A determination control circuit is provided for controlling a level determination timing of the level determining circuit. The determination control circuit supplies a control pulse signal of a long cycle to the level determining circuit when a charge pump is not operating, and supplies the control pulse signal of a short cycle to the level determining circuit when the charge pump is operating. The level determining circuit performs the level determination in accordance with a timing defined by the control pulse signal supplied from the determination control circuit. In response to the result of determination, the charge pump is driven. In this manner, a power consumption of a semiconductor memory device can be reduced, and overshoot of a boosted potential of the semiconductor memory device can be prevented.

REFERENCES:
patent: 5361237 (1994-11-01), Chishiki
patent: 5406523 (1995-04-01), Foss et al.

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