Semiconductor memory device having erroneous write operation pre

Details Semiconductor memory device having erroneous write operation pre Semiconductor memory device having erroneous write operation pre

1987-06-17

1988-12-13

Moffitt, James W.

Static information storage and retrieval

Powering

Data preservation

365189, 365218, G11C 700

Patent

active

047916141

ABSTRACT:
In a semiconductor memory device such as an E.sup.2 PROM, a write enable signal (WE) is supplied to a buffer formed by an enhancement-type transistor (Q.sub.11) and a depletion-type transistor (Q.sub.12) having a node (N.sub.3). The potential at this node is applied to a set terminal of a flip-flop (FF), and only when the potential at the node is higher than a trip point of the flip-flop, is the flip-flop set to generate an internal write enable signal (IWE) for an actual write operation.

REFERENCES:
patent: 4578781 (1986-03-01), Ogawa et al.

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