Semiconductor memory device having easily redesigned memory...

Static information storage and retrieval – Addressing – Plural blocks or banks

Reexamination Certificate

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Details

C365S222000, C365S230060, C365S230010

Reexamination Certificate

active

07009906

ABSTRACT:
Sub-blocks SBA0–SBA3, SBB0–SBB3, SBC0–SBC3, SBD0–SBD3respectively form four groups. In each group, a refresh end signal REF_END is successively transferred to the next sub-block. Therefore, when a refresh counter of the number of bits corresponding to the number of word lines present in a sub-block is provided in a central control circuit, a memory capacity can easily be redesigned by changing the number of sub-blocks and changing a group configuration of sub-blocks. As a result, there can be provided a memory core for embedded memory in which a memory capacity can easily be changed and a refresh control-related circuitry can easily be changed.

REFERENCES:
patent: 4172282 (1979-10-01), Aichelmann, Jr. et al.
patent: 6111808 (2000-08-01), Khang et al.
patent: 6538953 (2003-03-01), Hidaka
patent: 6888776 (2005-05-01), Watanabe et al.
patent: 3-80493 (1991-04-01), None

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