Semiconductor memory device having divided word or bit line driv

Static information storage and retrieval – Addressing – Plural blocks or banks

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

36523004, 36523006, 365185, G11C 802

Patent

active

049823728

ABSTRACT:
A memory array is divided into first and second memory array blocks. Two word line and/or bit line selection decoders are provided on each memory array block. One of two word line and/or bit line selection decoders is provided between two memory array blocks and the other is provided on the opposite side of the one word line selection decoder about the memory array block. A plurality of word lines in the memory array blocks are alternately connected to the one word line selection decoder and the other word line selection decoder.

REFERENCES:
patent: 4613958 (1986-09-01), Culican et al.
patent: 4783764 (1988-11-01), Tsuchiya et al.
patent: 4818900 (1989-04-01), Klass et al.
patent: 4875196 (1989-10-01), Spaderna et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Semiconductor memory device having divided word or bit line driv does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device having divided word or bit line driv, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device having divided word or bit line driv will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2001903

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.