Semiconductor memory device having data transition detecting fun

Details Semiconductor memory device having data transition detecting fun Semiconductor memory device having data transition detecting fun

1995-09-28

1997-07-22

Popek, Joseph A.

Static information storage and retrieval

Addressing

Sync/clocking

365191, G11C 1134

Patent

active

056509782

ABSTRACT:
A static RAM includes: a memory cell array including word lines, bit line pairs and memory cells; a row recorder; a column decoder; a DTD signal generator responsive to transition of input data or transition of a write enable signal for generating a data transition detection signal for a prescribed time period; and a write driver responsive to the write enable signal and the data transition detection signal for supplying the input data to a bit line pair selected by the column decoder. Even when there is a noise in write enable signal during reading cycle and data transition detection signal is generated erroneously, erroneous writing of data can be prevented, since write enable signal is not supplied to the write driver.

REFERENCES:
patent: 4751680 (1988-06-01), Wang et al.
patent: 4962487 (1990-10-01), Suzuki

Affiliated with

Also associated with

Rating

Semiconductor memory device having data transition detecting fun does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device having data transition detecting fun, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device having data transition detecting fun will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1564523