Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2002-07-12
2003-07-15
Nelms, David (Department: 2818)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185280, C257S315000
Reexamination Certificate
active
06594182
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a non-volatile semiconductor memory device, such as a flash memory, and more specifically, to the control of phosphorus concentration profiles in a floating gate electrode.
2. Description of the Background Art
A non-volatile semiconductor memory device, such as a flash memory, (hereafter simply referred to as “semiconductor memory device”) comprises an insulating film between a floating gate electrode and a control gate electrode, such as a laminated film (ONO film) consisting of the silicon oxide film (SiO
2
film) /silicon nitride film (Si
3
N
4
film)/silicon oxide film (SiO
2
film). In the laminated film (e.g., ONO film), the film known as a poly-gate oxide film (SiO
2
film) on the floating gate electrode is generally formed by the thermal oxidation of the surface of the floating gate electrode.
In the thermal oxidation, the forming rate of the poly-gate oxide film, that is, the oxidation rate of the floating gate electrode increases in parallel to the phosphorus concentration of the floating gate electrode. Therefore, there has been a problem that it is difficult to form a thin poly-gate oxide film with a high accuracy while maintaining a predetermined high concentration of phosphorus.
Also, there has been a problem that phosphorus in the floating gate electrode segregates on the located underneath the floating gate electrode, resulting in the degradation of write/erase repetition characteristics of the flash memory.
As a first method for solving the above-described problems, there is proposed a method for forming a polysilicon film containing no impurities on a polysilicon film containing a high concentration of thermally diffused phosphorus, for example, as disclosed in Japanese Patent Laid-Open No. 64-59869.
As a second method, there is proposed a method for forming a polysilicon films having different phosphorus concentrations through an impurity diffusion controlling film, as disclosed in Japanese Patent Laid-Open No. 2000-195973.
In the two above-described methods, however, there has been a problem that the number of manufacturing steps increases since the formation of the floating gate electrode is discontinuous. Also, there has been a problem that the quality of the floating gate electrode is deteriorated by the contamination by organic compounds contained in the atmosphere of a clean room, or by the formation of natural oxide films.
Also, on the oxidation of the sidewall of the floating gate electrode performed after the formation of the control gate electrode, the source and the drain, the quantity of oxidation could not be controlled. In other words, the thickness of the sidewall oxide film that covers the sidewall of the floating gate electrode could not be controlled. Therefore, there has been a problem that the electric field concentration occurs in the edge (corner) of the floating gate electrode, and the reliability of the tunnel gate insulating film lowers. This problem could not be solved by any of the above-described methods.
SUMMARY OF THE INVENTION
The present invention has been conceived to solve the previously-mentioned problems and a general object of the present invention is to provide a novel and useful semiconductor memory device, and is to provide a novel and useful method for manufacturing semiconductor memory device, and is to a novel and useful semiconductor manufacturing apparatus.
A more specific object of the present invention is to control the distribution of impurity concentrations in the floating gate electrode of the semiconductor memory device, and to improve device characteristics.
The above object of the present invention is attained by a following semiconductor memory device, and by a following method for manufacturing semiconductor memory device, and by a following semiconductor manufacturing apparatus.
According to first aspect of the present invention, the semiconductor memory device comprises a tunnel gate insulating film formed on a substrate. A floating gate electrode is formed on the tunnel gate insulating film, the floating gate electrode containing no impurities in the vicinities of the upper and lower end surfaces of the floating gate electrode. An insulating film is formed on the floating gate electrode.
According to second aspect of the present invention, in the method for manufacturing a semiconductor memory device, a tunnel gate insulating film is formed on a substrate. A floating gate electrode is formed on the tunnel gate insulating film so that the floating gate electrode contains no impurities in the vicinities of the upper and lower end surfaces of the floating gate electrode. An insulating film is formed on the floating gate electrode.
According to third aspect of the present invention, the semiconductor manufacturing apparatus for forming a floating gate electrode on a substrate comprises a first supplying section for supplying a material gas containing no impurities. A second supplying section supply a gas containing an impurity. A control unit controls the first supplying section and the second supplying section, the control unit controlling the second supplying section to change the flow rate of the gas containing the impurity when the floating gate electrode is formed.
REFERENCES:
patent: 5015327 (1991-05-01), Taguchi et al.
patent: 5173440 (1992-12-01), Tsunashima et al.
patent: 5437762 (1995-08-01), Ochiai et al.
patent: 6153470 (2000-11-01), He et al.
patent: 6455890 (2002-09-01), Chang et al.
patent: 64-059869 (1989-03-01), None
patent: 2000-195973 (2000-07-01), None
Japanese patent JP403035564A by Ikegami,Masami I.*
Japanese patent JP355003378A by Abe, Haruhiko I.
Burns Doane , Swecker, Mathis LLP
Nguyen Thinh T.
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