Semiconductor memory device having clock frequency multiplying a

Details Semiconductor memory device having clock frequency multiplying a Semiconductor memory device having clock frequency multiplying a

1998-12-29

2000-12-12

Wells, Kenneth B.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Frequency or repetition rate conversion or control

327119, H03B 1900

Patent

active

061604267

ABSTRACT:
A clock frequency multiplying apparatus is disclosed. The apparatus includes a clock generator for generating a clock signal, a data input buffer for serially receiving a data, address, instruction, etc. when a transmission clock signal generated by the clock generator is inputted, a data shift register for grouping the data received through the data input buffer into a data packet and, in parallel, transferring the same to a memory, and a clock frequency multiplier for multiplying a transmission clock frequency generated by the clock generator and inputting the same into the data shift register for implementing a fast data transfer by multiplying a clock frequency by dividing the clock signal in an internal circuit of the DRAM into a critical path and a non-critical path by using a transmission clock signal for the critical path and the multiplied clock signal for the non-critical path and enhancing an internal data transfer ratio.

REFERENCES:
patent: 5388249 (1995-02-01), Hotta et al.
patent: 5537660 (1996-07-01), Bond et al.
patent: 5548285 (1996-08-01), Ford et al.
patent: 5777500 (1998-07-01), Eitrheim
patent: 5778237 (1998-07-01), Yamamoto et al.
patent: 6018305 (2000-01-01), Kikuchi et al.

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