Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Patent
1997-08-20
1999-04-20
Nelms, David
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
36518907, 326106, 326108, G11C 800
Patent
active
058963430
ABSTRACT:
The drive circuit of the present invention includes a signal generation circuit which generates a drive signal at a specific timing. A first driver circuit drives one end of a first wire connected to a plurality of controlled circuits in response to the drive signal. A second driver circuit drives one end of a second wire having a smaller drive load than the first wire in response to the drive signal. A high speed driver circuit has its inputs connected to the other end of the second wire and to the other end of the first wire, and has an output terminal that drives the other end of the first wire when the voltage level at the other end of the second wire does not coincide with the voltage level at the other end of the first wire. By using the second wire as a bypass wire, by providing the drive signals to the high speed driver circuit without any delay, and by having the high speed driver circuit drive the first wire accordingly, it is possible to minimize the propagation delay of the drive signals supplied by the first wire which has a large drive load.
REFERENCES:
patent: 5696731 (1997-12-01), Miyamoto
Fujitsu Limited
Nelms David
Tran Andrew Q.
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