Semiconductor memory device having a write per bit function in p

Details Semiconductor memory device having a write per bit function in p Semiconductor memory device having a write per bit function in p

1992-10-15

1994-05-24

LaRoche, Eugene R.

Static information storage and retrieval

Addressing

Byte or page addressing

36518905, 365195, G11C 800, G11C 700

Patent

active

053155602

ABSTRACT:
A semiconductor memory device is provided with a plurality of input circuits each having a mask information generating circuit to enable bit writing in page mode. The mask information generating circuit generates mask information from a mask control signal supplied from a mask control circuit, mask data supplied from a mask data input buffer circuit, an internal signal and a special function signal. The mask information generating circuit controls the mask information, depending on the state of the special function signal at the fall of an external column address strobe signal such that the mask information may change on each column address strobe cycle.

REFERENCES:
patent: 4817058 (1989-03-01), Pinkham
patent: 4951251 (1990-08-01), Yamaguchi et al.
patent: 4962486 (1990-10-01), Masuda et al.
patent: 5001673 (1991-03-01), Norwood et al.
patent: 5134582 (1992-07-01), Ishii
patent: 5134589 (1992-07-01), Hamano
patent: 5148396 (1992-09-01), Nakada
patent: 5198804 (1993-03-01), Mori

Affiliated with

Also associated with

Rating

Semiconductor memory device having a write per bit function in p does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device having a write per bit function in p, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device having a write per bit function in p will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1978589