Semiconductor memory device having a plurality of blocks

Details Semiconductor memory device having a plurality of blocks Semiconductor memory device having a plurality of blocks

1995-04-13

1997-01-14

Nelms, David C.

Static information storage and retrieval

Addressing

Plural blocks or banks

365203, 365200, G11C 800, G11C 2900

Patent

active

055947018

ABSTRACT:
Precharge circuits precharge plural pairs of bit lines to a specified potential when no word line is selected (during standby). Pull-down transistors are turned ON when the corresponding word lines are not selected so as to connect the corresponding word lines to a common power source line, which is connected to the ground. In a path connecting the above common power source line to the ground is disposed an impedance changing means for changing the impedance of the path between a value during standby and another valve during operation during which any word line is selected so that the value during standby is set higher than the value during operation. Consequently, during standby, a leakage current (standby current) resulting from a short circuit between a bit line and a word line is reduced.

REFERENCES:
patent: 4967347 (1990-10-01), Smith et al.
patent: 5343431 (1994-08-01), Ohtsuka et al.
patent: 5349557 (1994-09-01), Yoshida
patent: 5394368 (1995-02-01), Miyamoto
patent: 5402376 (1995-03-01), Horiguchi et al.
patent: 5469401 (1995-11-01), Gillingham
patent: 5471427 (1995-11-01), Murakami et al.
patent: 5475648 (1995-12-01), Fujiwara

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