Static information storage and retrieval – Addressing – Byte or page addressing
Patent
1990-07-23
1992-07-28
Fears, Terrell W.
Static information storage and retrieval
Addressing
Byte or page addressing
36523005, 365218, G11C 1300
Patent
active
051345897
ABSTRACT:
A semiconductor memory device having a flash write function includes a row decoder (2) decoding external row address for selecting one row of a memory cell array (1'), and circuitry (4, 8) responsive to a flash write designating signal for writing the same data simultaneously to the memory cells connected to the selected row. The semiconductor memory device has at least one memory block (MB1, MB2, MB, MB4), with each of the block having a plurality of column groups (B1, B2, B3, B4) each including a plurality of columns. The memory cell block has a plurality of memory cells arranged in rows and columns which can be accessed at random sequence. The memory device further includes circuitry (6) for generating the mask position designating signal at the time of flash writing, and circuitry (4-1 to 4-n, 7) for prohibiting writing of data to the column group designated by the mask position designating signal. This structure provides a semiconductor memory device which executes window processing or the like at high speed. The semiconductor memory device is a multiport random access memory for image processing.
REFERENCES:
patent: 4890260 (1989-12-01), Chuang et al.
Fears Terrell W.
Mitsubishi Denki & Kabushiki Kaisha
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