Semiconductor memory device for storing data with efficient page

Static information storage and retrieval – Addressing – Byte or page addressing

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36523006, G11C 800

Patent

active

061153230

ABSTRACT:
The objective of the invention is to conduct access of image data in the diagonal direction at high-speed by using the page mode.
The memory region is divided into four memory arrays (15.sub.-1 to 15.sub.-4), and shifters (13.sub.-1 to 13.sub.-4) [sic: (14.sub.-1 to 14.sub.-4)] are provided that can shift the page address by one address in relation to each memory array. The image data are divided into sub-blocks of 4.times.4, 4 data items for the vertical correction are stored in the same memory array, and the page addresses for the sub-blocks connected in the horizontal direction are stored so as to be consecutive. In the case of accessing the data in the diagonal direction, when the data straddle adjacent blocks 4 at a time from the top, the page address is shifted by a shifter for the memory array containing that straddled column. In this way even in accessing the diagonal direction, 4 units of data are always obtained for a 1-page access, and data scanning of the diagonal direction by the page mode becomes possible.

REFERENCES:
patent: 5586196 (1996-12-01), Sussman
patent: 5638128 (1997-06-01), Hoogenboom et al.
patent: 5675363 (1997-10-01), Omori
patent: 5872869 (1999-02-01), Shimizu et al.

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