Semiconductor memory device for self-correcting data output erro

Details Semiconductor memory device for self-correcting data output erro Semiconductor memory device for self-correcting data output erro

1990-04-17

1993-08-24

Lee, Thomas C.

Excavating

395575, 371 404, 371 41, 365 94, 365200, 365201, 3642446, 3642447, 3642653, 3642665, 364DIG1, 36494492, G06F 1100, G06F 1108

Patent

active

052396568

ABSTRACT:
A self-error-correcting semiconductor memory device having a programmable ROM for storing first and second data, at least one temporary register for temporarily storing data and a one-time PROM for writing one time, wherein first data stored in a true address and second data identical to the first data stored in a dummy address both within the programmable ROM are outputted to a data bus and multiplied with each other so as to obtain a third data for performing an error correction.

REFERENCES:
patent: 4958352 (1990-09-01), Noguchi et al.
patent: 5109359 (1992-04-01), Sakakibara et al.
Kitano, Y., Kohda, S., Kikuchi, H., Sakai, S., "A 4-Mbit Fullwafer ROM", IEEE Journal of Solid-State Circuits, vol. SC-15, No. 4, pp. 686-693 (Aug. 1980).

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