Semiconductor memory device for reducing current consumption...

Details Semiconductor memory device for reducing current consumption... Semiconductor memory device for reducing current consumption...

2006-06-06

2006-06-06

Tran, Michael (Department: 2827)

Static information storage and retrieval

Addressing

Sync/clocking

C365S230010

Reexamination Certificate

active

07057966

ABSTRACT:
A synchronous memory device can reduce unnecessary current consumption in its operation. In the synchronous memory device, a clock receiver receives an external clock to output a first internal clock. An address latch unit receives and latches an address in synchronous with the first internal clock. A row address latch unit latches a row address that is outputted from the address latch unit. A column address control unit receives the first internal clock to output a second internal clock and stops the output of the second internal clock when a non-column command is performed. Finally, a column address control unit is activated in response to the second internal clock to count a column address that is outputted from the address latch unit so as to output an inner column address.

REFERENCES:
patent: 6636446 (2003-10-01), Lee et al.
patent: 6671788 (2003-12-01), Shinozaki
patent: 2002/0110037 (2002-08-01), Fukuyama
patent: 10-2000-0052588 (2000-08-01), None

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