Semiconductor memory device for plurality of ranges of power sup

Details Semiconductor memory device for plurality of ranges of power sup Semiconductor memory device for plurality of ranges of power sup

1996-02-28

1998-04-21

Zarabian, A.

Static information storage and retrieval

Addressing

Sync/clocking

365233, G11C 700

Patent

active

057425582

ABSTRACT:
In a semiconductor memory device including an address transition detecting circuit, a timing pulse generating circuit for generating a timing pulse signal in response to an output signal of the address transition detecting circuit, end a sense amplifier for sensing data read from a memory cell array, the sense amplifier is made active by the timing pulse signal. A power supply voltage determining circuit determines whether or not a power supply voltage is higher than a certain value, and a pulse width of the timing pulse signal is controlled by an output of the power supply voltage determining circuit.

REFERENCES:
patent: 4972374 (1990-11-01), Wang
patent: 5428580 (1995-06-01), Kawashima

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