Semiconductor memory device for improving access time in...

Details Semiconductor memory device for improving access time in... Semiconductor memory device for improving access time in...

2006-10-17

2006-10-17

Ho, Hoai V. (Department: 2827)

Static information storage and retrieval

Addressing

Plural blocks or banks

C365S200000, C365S205000, C365S233100

Reexamination Certificate

active

07123538

ABSTRACT:
A semiconductor memory device is disclosed. A block unit is divided into memory mats based on an internal address. In the case where the internal address is “1”, data are read in ascending order in accordance with a start address from the memory mat, while the internal address is incremented by an address conversion circuit thereby to select a 4-word block including the words next selected from the memory mat. At the same time, the internal address is incremented based on the start address, so that the period for reading each word included in the lowest order of 4-word block can be secured. In the process, the address next to be input can be decoded.

REFERENCES:
patent: 6668345 (2003-12-01), Ooishi et al.
patent: 6731400 (2004-05-01), Nakamura et al.
patent: 2003/0135697 (2003-07-01), La
patent: 09-106669 (1997-04-01), None
patent: 9-106689 (1997-04-01), None
patent: 2003-0061217 (2003-07-01), None

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