Semiconductor memory device for driving a word line

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

Reexamination Certificate

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Details

C365S230030, C365S200000

Reexamination Certificate

active

07733736

ABSTRACT:
A semiconductor memory device for driving a word line is provided. The enabling timing of a word line is advanced using a block information signal that contains no redundancy information, thereby improving a RAS to CAS delay (tRCD). A sub word line driving enable signal for controlling a driving of a sub word line and a main word line driving enable signal for controlling a driving of a main word line are controlled by the block information signal that contains only mat information but does not contain the redundancy information. Accordingly, the word line control signal may be activated earlier than the sub word line driving enable signal and the main word line driving enable signal, thereby advancing the enable timing of the word line.

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